The VU19P has 35 billion transistors to provide the highest logic density and I/O count on a single device. It features 9 million system logic cells, has up to 1.5 terabits per-second of DDR4 memory bandwidth and up to 4.5 terabits per-second of transceiver bandwidth, as well as over 2,000 user I/Os. The VU19P is 1.6X larger than the 20 nm Virtex UltraScale 440 FPGA, its predecessor which used to hold the crown for the largest FPGA.
The VU19P has comprehensive support with debug, visibility tools, and IP for speedy design and validation. Hardware and software co-validation helps to bring up software and implement custom features before physical parts are available. The design flow can also be co-optimised by using the Xilinx Vivado Design Suite, reducing risk and cost.