Synopsys has announced that the Synopsys Fusion Design Platform™ has enabled Samsung Foundry to achieve first-pass silicon success for an advanced, high-performance and multi-subsystem system-on-chip (SoC), validating the extended power, performance and area (PPA) benefits of its next-generation, 3-nm gate-all-around (GAA) process technology. This tapeout is the culmination of an extensive collaboration between Synopsys and Samsung Foundry to accelerate the delivery of a highly optimized reference methodology that realizes the maximum power and performance opportunities inherent to the latest 3D transistor architecture.
The reference flow from Synopsys deploys the full breadth of the highly integrated Fusion Design Platform from Synopsys, including the industry's only integrated and golden-signoff-enabled RTL-to-GDSII design flow coupled with the most trusted, golden-signoff products. Customers targeting Samsung Foundry's latest 3-nm GAA process can realize the maximum PPA entitlement for next-generation designs spanning high-performance computing (HPC), 5G, mobile and advanced, artificial intelligence (AI) applications.
"Samsung Foundry is at the heart of fueling the next phase of industry innovation with our continued process-technology-based evolutions to meet the growing demands of both specialized and broad-market applications," said Sangyun Kim, Vice President of Foundry Design Technology Team at Samsung Electronics. "Our latest, advanced 3nm GAA process has benefited from our extensive collaboration with Synopsys, and the accelerated readiness of the Fusion Design Platform to enable the efficient realization of the 3nm process' promise, is a testament to the importance and benefit of these key alliances.”