The two-chip set comprises the ST8500 programmable PLC engine and STLD1 line-driver. The ST8500 is a System-on-Chip IC containing a high-performance quad-core DSP for real-time protocol processing, and an ARM Cortex-M4F core for upper-layer processing and system management. Each has its own code and data SRAM on-chip, and a dedicated set of peripherals focused on smart-energy applications is provided, including an AES cryptographic engine. The analogue front end (AFE) for connecting to the STLD1 line driver is also integrated.
The ST8500 consumes less than 100 mW in receive mode, ensuring ultra-low-power performance in line with the latest specifications to minimize the grid load imposed by new smart meters. The STLD1 line driver communicates reliably, even across noisy cables and with low impedance, with high-drive capability and high linearity over a wide output range of 18V in single-ended or 36V in differential mode.
The chipset is supplied with certified G3-PLC and PRIME power-line protocol stacks and complies with CENELEC, FCC, and ARIB frequency-band regulations. The ST8500 SoC is packaged as a 7 x 7 x 1 mm QFN56, and the STLD1 is a 4 x 4 x 1 mm QFN24.
ST proposes the chipset for applications – as well as utility meters and smart-grid nodes – streetlamps, and home and industrial controllers. Three leading global smart-meter manufacturers are already designing solutions based on this new platform.
The chipset consolidates protocol handling to package and adapt data so it can be transmitted and line driving for sending over mains wires. It enables customers to implement powerline communications cost-effectively, either as part of new designs or as the core of an add-on module on older devices. The solution is also a fit for markets with specific regulatory requirements. In these scenarios, the ST PLC-modem chipset acts as an external communication module that interfaces with either the existing or a new metering or controlling device. Flexible programmability allows multiple product