Six breakthroughs in 3D sequential integration highlighted in IEDM paper

December 05, 2018 //By Julien Happich
Six breakthroughs in 3D sequential integration highlighted in IEDM paper
In a paper presented at IEDM 2018, research institute CEA-Leti describes breakthroughs in six 3D-sequential-integration process steps that previously were considered showstoppers in terms of manufacturability, reliability, performance or cost.

CEA-Leti’s 3D monolithic or 3D sequential CMOS technology, CoolCube, allows to vertically stack several layers of devices with a unique connecting-via density above tens of million/mm2. This More Moore technology is said to decrease dice area by a factor of two, while providing a 26 percent gain in power. The wire-length reduction enabled by CoolCube also improves yield and lowers costs. In addition to power savings, this true 3D integration opens diversification perspectives thanks to more integration of functions. From a performance optimization and manufacturing-enablement perspective, processing the top layer in a front end of line (FEOL) environment with a restricted thermal budget requires process modules optimization.

The six breakthroughs highlighted in the paper, “Breakthroughs in 3D Sequential Integration” include the design of low-resistance poly-Si gate for the top field-effect transistors (FETs), full LT RSD (low temperature raised source and drain) epitaxy, including surface preparation, the stable bonding above ultra-low-k (ULK) materials, stability of intermediate back end of line (iBEOL) between tiers with standard ULK/Cu technology, the efficient contamination containment for wafers with Cu/ULK iBEOL, enabling their re-introduction in front end of line (FEOL) for top FET processing, and finally the Smart Cut process above a CMOS wafer.

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