Renesas provides power and timing for Versal ACAP reference designs

December 17, 2019 //By
Renesas has added its own power solutions and IDT’s timing support for the Xilinx Versal devices on the Xilinx VCK190 evaluation kit and the Renesas VERSALDEMO1Z power reference board.
Renesas has added its own power solutions and IDT timing support for the Xilinx Versal devices on the Xilinx VCK190 evaluation kit and the Renesas VERSALDEMO1Z power reference board.

The 7nm devices from the Versal adaptive compute acceleration platform (ACAP) are designed for a wide range of applications in datacenter, automotive, 5G wireless, and wired and defence markets.

The Xilinx VCK190 Versal AI Core series evaluation kit is centred on the VC1902 Versal AI Core series ACAP. The device provides the highest AI inference and signal processing throughput in the series. The kit uses the 8A34001 ClockMatrix system synchronizer for IEEE1588 and eCPRI applications, 8T49N240/41 Universal Frequency Translators for low-jitter and flexible transceiver SerDes clocking, along with a programmable clock generator and clock buffer/multiplexer for PCIe interface. Renesas subsidiary, IDT’s portfolio of timing solutions meet all Versal timing requirements with ultra-low phase noise.

The Renesas VERSALDEMO1Z power reference board has full power rails for the Versal ACAP’s adaptable engines, AI engines, scalar engines, and external DDR memory. The board is a complete power supply solution that has one member of Renesas’ ISL68xxx digital multiphase PWM controller family and multiple members of the ISL99xxx smart power stage family to provide high-efficiency and scalable Vcore power. Also included are the ISL91211A PMIC and DC-DC regulators.

More information

www.renesas.com/solutions/key-technology/fpga-power-solutions/xilinx-versal-acap-power-timing.html

www.renesas.com/products/software-tools/boards-and-kits/demonstration-kits/versaldemo1z.html

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