The RA Family is PSA Certified Level 1 and includes the RA2 Series (up to 60 MHz), RA4 Series (up to 100 MHz), RA6 Series (up to 200 MHz), and the dual-core RA8 Series, to be released later.
Available now, the first five RA MCU Groups are comprised of 32 scalable MCUs with Arm Cortex-M4 and Cortex-M23 cores. They have pin counts of 32-pins to 176-pins, along with 256 KB to 2 MB of code Flash, 32 KB to 640 KB SRAM, and connectivity such as USB, CAN and Ethernet. The MCU series are feature and pin compatibility for easy transition. They include enhanced features such as Renesas’ HMI capacitive touch technology.
The RA Family Flexible Software Package (FSP) provides an open architecture that allows the re-use of legacy code in combination with software examples from Renesas and ecosystem partners to ease implementation of complex functions. FSP also features Amazon FreeRTOS. Out-of-box support for ThreadX RTOS and middleware on Cortex-M23 and Cortex-M33 MCUs will be added by early 2020.
Additional MCUs will be released through 2020 with more advanced technologies and unique features. The roadmap offers PSA Certified and Trusted Firmware-M (TF-M) API compliant devices, including Cortex-M33 MCUs, low-power Cortex-M23 MCUs, and BLE / IEEE 802.15.4 wireless IoT products. MCUs with TF-M / PSA certification will allow the quick deployment of secure IoT endpoint and edge devices.
The first tranche of RA devices integrates hardware-based security features from simple AES acceleration to fully-integrated crypto subsystems isolated within the MCU. The Secure Crypto Engine provides symmetric and asymmetric encryption and decryption, hash functions, true random number generation (TRNG), and advanced key handling, including key generation and MCU-unique key wrapping. An access management circuit shuts down the crypto engine if the correct access protocol is not followed, and dedicated RAM ensures that plaintext keys are never exposed to any CPU or peripheral bus.
The RA Family development environment offers on-chip debug, IDEs,