STM32L5 MCUs have a security architecture based on Arm TrustZone with the ARMv8-M Main Extension. The 32-bit Cortex-M33 core with FPU implements a full set of DSP instructions and a memory protection unit (MPU) for enhanced security. The STM32L5 range has also received PSA Level 1 and Level 2 certifications from Arm.
The STM32L5 MCUs have up to 512 Kbyte flash, 256 Kbytes SRAM and a flexible external memory controller for static memories. Additional features include an octo-SPI flash memories interface and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses, and a 32-bit multi-AHB bus matrix. The devices also integrates ST’s ART Accelerator, for zero-wait states out of the 64-bit program flash at a clock speed of up to 110 MHz and 165 DMIPS performance.
The MCUs use ST’s low-power technologies, such as voltage scaling to balance power consumption with processing demand, and a comprehensive set of power-saving modes (including a run mode as low as 62 µA/MHz and a 108 nA standby mode).