Monolithic JFETs are alive and well

August 18, 2016 //By Steve Taranovich, EDN
Monolithic JFETs are alive and well
High integration in today’s analogue ICs is ever expanding, but there are time when a circuit designer needs to design a better differential stage to an amplifier, especially an audio amp or pre-amp, or a voltage controlled resistor, thermally stable follower, sample and hold or matched current sources or when the source is a very high impedance as in electrometer designs where super low bias current and low noise is critical.

Circuit design engineers need to look closely at the benefits of using discrete active devices like these. Jim Williams and Bob Pease were masters of using high-performance discrete active transistors to enhance their design performance when placed in critical areas of their system designs.


Linear Integrated Systems just introduced its LSJ689, a dual, P-channel JFET which is the complement to its LSK489, a dual, N-channel JFET. This new, dual, P-channel JFET has an excellent noise voltage spec at 1.8 nV/√Hz at 1 kHz with low input capacitance (8 pF typical). Plus there is near-zero popcorn noise in these devices. Although this type of noise has been virtually eliminated from ICs (note the term ‘virtually’), there are occasions where any level of noise, no matter how infrequently it may occur, can interfere with sensitive circuit designs. The low offset voltage from very close matching of transistor characteristics is 20 mV maximum.



Figure 1. Linear Integrated Systems' LSJ689 dual, P-channel JFET has an excellent noise voltage spec at 1.8 nV/√Hz at 1 kHz with low input capacitance (8 pF typical).


Circuit designers will find that tighter I DSS (drain-source saturation current) matching to a 10% maximum as well as better thermal tracking (due to being on a monolithic die) can be obtained with these devices than by using individual JFETs.



Bob Cordell wrote an excellent application note on High-Performance Complementary Input Stages . An example of one of his applications is a full complementary input stage fed into a push-pull second stage (Figure 2).



Figure 2. This full complementary input stage feeds into a push-pull second stage (Q5, Q6) that will sum the outputs of the top (Q1, Q2) and bottom (Q3, Q4) input pairs.


In Figure 2 and similar configurations, negative feedback is usually employed. Each long-tailed pair has a 2 mA current source (I1 and I2), connected to its associated

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