Microbenchmarks speed up the adoption of complex hardware in critical real-time systems

February 05, 2020 //By Wisse Hettinga
Microbenchmarks speed up the adoption of complex hardware in critical real-time systems
New BSC spin-off company will develop tools simplifying the generation of evidence on the correctness of the timing behaviour of safety application in critical domains like avionics and automotive in the adherence to safety/certification guidelines.

Barcelona Supercomputing Center has launched a new spin-off, Maspatechnologies, that aims to provide multicore timing analysis solutions in accordance to safety standards for critical embedded systems, including automotive, aerospace and space industry. The main product offered by Maspatechnologies is a software component called micro-benchmark technology to be used for timing verification, validations and optimization of software developed for embedded real-time domains. Micro-benchmarks will significantly reduce the cost of end users to provide evidence about the correct timing behaviour of the applications on the target multicore.

The news spin-off will provide multicore support verification and validation tools and services that help critical real-time industries to adopt multicore- manycore- and accelerator-based platforms. In particular, Maspatechnologies tools simplify obtaining evidence for safety application in adherence to safety/certification guidelines in terms of timing. This includes CAST-32A in avionics and ISO 26262 safety standard in automotive.

The main invention element is a set of specialized user-level benchmarks that put a configurable, usually high, frequency access load on a target set of processor resources like caches, buses or memory. This so called microbenchmarks, are single-behaviour applications that constantly access the target resources. The invention also includes a set of scripts able to produce microbenchmarks automatically from a description of the target resource. For instance, for a cache the description includes parameters like its associativity, cache line size, and total size. Derived technologies from micro-benchmarks also include software multicore contention models, all with the goal of providing evidence of the correct timing behaviour of applications in multicore-based embedded systems

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