Libero SoC version 12.0 provides unified design suite for latest FPGA families

January 30, 2019 //By Ally Winning
Libero SoC version 12.0 provides unified design suite for latest FPGA families
Microchip has launched Libero SoC version 12.0 to deliver significant productivity gains and provide a unified design suite for all the company’s latest-generation FPGA families.

The new software, launched by Microchip subsidiary Microsemi, reduces design flow runtimes and provides results in fewer design iterations, improving productivity. Libero SoC v12.0 can provide a runtime reduction of 60% for timing, 25% for place and route and 18% for power results.

The launch of Libero SoC v12.0, comes at the same time as the production release of the PolarFire MPF100T, PolarFire MPF200T and PolarFire MPF300T FPGAs. The release includes production timing and power for PolarFire MPF300T-1 devices, as well as support for the low-power, radiation-tolerant RT4G150L and military-grade support for the SmartFusion2 M2S150T/S FCV484 device.

A single design suite for PolarFire, IGLOO2, SmartFusion2 and RTG4 FPGAs negates the need for qualifying multiple pieces of software across product families. Libero SoC v12.0 now supports FPGA Hardware Breakpoint (FHB) for RTG4 and PolarFire devices, PCIe debug support for PolarFire and continuous transceiver eye monitoring using SmartDebug.

The new release also improves Double Date Rate (DDR) memory performance by an average of 29% in high-effort mode and 39% in regular-effort mode. Enhanced Tool Command Language (TCL) support enables designers to run the entire design flow on the command line if they choose.

More information

https://www.microsemi.com/product-directory/design-resources/1711-licensing

https://www.microsemi.com/product-directory/design-resources/1750-libero-soc#downloads

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