Lattice FPGA Developers have easy access to RISC-V Processors

December 12, 2019 //By Wisse Hettinga
Lattice FPGA Developers have easy access to RISC-V Processors
Easy availability of SiFive scalable Core IP for developers using Lattice FPGA product families, including Lattice’s new 28 nm CrossLink-NX™ FPGAs.

The need for intelligent processing at the Edge and endpoint is increasing, with new AI/ML applications in industrial, automotive, and consumer IoT being developed to reduce latency, power, and cost. Performing AI/ML processing outside of the data center reduces bandwidth and privacy concerns while increasing responsiveness through lower latency. These factors combine to drive the increasing need for embedded intelligence in an anticipated more than 64 billion new devices at the Edge and endpoint in the coming decade.

SiFive’s scalable approach to processor core design enables Lattice to create application targeted Core IP, focused on the features and performance requirements of the workload. Lattice and SiFive plan to collaborate on delivering new, optimized processor cores using SiFive IP based on the free and open RISC-V ISA. SiFive E2 Core IP will power Lattice FPGA solutions for a diverse array of use cases and markets, from control plane processing in communications infrastructure to data path processing in Edge applications.

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