IO-Link master dev kit accelerates sensor network gateway design

November 22, 2018 // By Julien Happich
Renesas' IO-Link master development kit includes a board and pre-qualified sample software provided by TMG. The board has eight IO-Link connectors allowing developers to immediately connect IO-Link slave devices and start the evaluation process.

The solution is supported by two CPUs that operate independently and simultaneously with a large built-in SRAM. The eight-port IO-Link Master is controlled by one CPU; the other CPU features an R-IN engine architecture and supports Industrial Ethernet communication to the upper layers, such as PLC, without any external microcontroller, microprocessor, or memory like DDR. Integrating the two CPUs in a small 12x12mm LFBGA package also helps with designing compact PCBs.

Renesas Electronics –

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