Imec study addresses Joule heating of interconnects at 1nm

July 08, 2021 // By Jean-Pierre Joosting
Imec study addresses Joule heating of interconnects at 1nm
Research lab imec has developed new ways to use metal interconnects in silicon chips built with 1nm process technology to alleviate Joule heating effects.

Researchers at imec have reported, in an experimental study of Al-based binary compounds with a focus on their resistivity behavior, that stoichiometric AlCu and Al2Cu films exhibit a resistivity as low as 9.5 µΩcm. These results experimentally support their promise to be used as new conductors in advanced semi-damascene interconnect integration schemes, where they can be combined with airgaps for improved performance. In this combination, however, Joule heating effects are becoming increasingly important. This was predicted by combined experimental and modeling work in a 12-layer back-end-of-line (BEOL) structure – implementing new metals and airgaps.

Scaling down the logic technology roadmap to 1nm and beyond will require the introduction of new conductor materials in the most critical layers of the back-end-of-line. Of interest are binary and ternary intermetallic compounds (e.g., Al or Ru based) with lower resistivity than conventional elemental metals (such as Cu, Co, Mo or Ru) at scaled dimensions. Imec has experimentally investigated the resistivity behavior of thin films of aluminides, including AlNi, Al3Sc, AlCu and Al2Cu. At 20nm thickness and above, all PVD-deposited films showed resistivities comparable to or lower than Ru or Mo. The lowest resistivity of 9.5 µΩcm was achieved for 28nm films of AlCu and Al2Cu – a value that goes below that of Cu. The experiments also indicated challenges for the studied aluminides, such as the control of the film stoichiometry and surface oxidation.

Imec envisions to introduce intermetallic compounds in advanced semi-damascene integration schemes, which involve the direct etch of a patternable metal to achieve higher aspect ratio lines. Further improvements in RC delay can be obtained by gradually introducing partial or full airgaps in between the metal lines. Replacing conventional low-k dielectrics with electrically isolating airgaps is expected to reduce capacitance at scaled dimensions. But airgaps have an extremely poor thermal conductivity, which raises concerns for Joule heating at operation conditions.

Figure: Resistivity of ~28nm thick Al-Cu films versus Al concentration, both as deposited and after post-deposition annealing (PDA) at the indicated temperatures. Image courtesy of imec.

Temperature map of 12-metal-layer interconnect with air gaps at the local level. Image courtesy of imec.

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