IAR supporting DesignStart for Arm Cortex-A5

November 27, 2018 //By Ally Winning
IAR supporting DesignStart for Arm Cortex-A5
IAR Systems’ development toolchain IAR Embedded Workbench now supports the Cortex-A5 CPU through the Arm DesignStart program.

The company has expanded its presence in the Arm DesignStart community to provide SoC designers with the option to use IAR Embedded Workbench for SoCs using DesignStart for Cortex-M and Cortex-A processors.

The Arm DesignStart program allows developers to create custom SoCs using Arm Cortex-M0, Cortex-M3, or Cortex-A5 processors, and provides a verified subsystem for a range of applications. Developers can now use IAR Embedded Workbench to take advantage of Arm DesignStart features. IAR Embedded Workbench features a highly optimising C/C++ compiler and a powerful debugger. Automatic vectorization compiler support simplifies the use of NEON technology, an advanced SIMD (single instruction multiple data) extension available in Cortex-A and Cortex-R processors, including Arm Cortex-A5. NEON technology accelerates audio and video encoding/decoding, and user interfaces. NEON can also accelerate signal processing algorithms and functions to speed up applications.

IAR Embedded Workbench’s IAR C/C++ Compiler generates very fast and compact code. The C-SPY Debugger includes comprehensive debugging functionality such as full instruction trace enabled by Embedded Trace Macrocell (ETM), and offers RTOS plugins and wide support for communication stacks and middleware. Integrated and easy-to-use static and runtime analysis tools are available for ensured code quality.

More information

www.iar.com/iar-embedded-workbench

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