The QuartzXM Model 6003 is based on Xilinx’ Zynq UltraScale+ RFSoC Gen 3, which offers full sub-6 GHz direct-RF I/O support and more flexibility and greater decimation and interpolation options. The QuartzXM Model 6003 has been developed for 5G and LTE wireless, SIGINT, EW, communications and radar applications in SWaP-critical environments.
"Immediately releasing products utilizing Xilinx Zynq UltraScale+ RFSoC Gen 3 demonstrates our commitment to offering our customers the latest technology for their applications,” said Bob Sgandurra, Pentek’s director of Product Management. “The modularity of our Quartz product line enables us to quickly provide solutions in any form factor needed -- whether it’s in the lab or in a deployed application.”
The new Quartz products support direct RF sampling using 5 GS/sec 14-bit ADCs and eight 10 GS/sec 14-bit DACs. Both support analog signals up to 6 GHz. The data converter have built-in digital downconverters or upconverters with programmable decimation and interpolation up to 40x and independent tuning for increased RF flexibility and frequency planning.
The RFSoC is the centre of the design. All of its control and data paths are accessible through the RFSoC’s programmable logic and processing system. The Xilinx Zynq UltraScale+ RFSoC Gen 3 features eight RF-class ADCs and DACs in the Zynq FPGA fabric. The fabric also has quad ARM Cortex-A53 and dual ARM Cortex-R5 processors, creating a multichannel data conversion and processing solution on a single chip.
Beside the RFSoC’s resources, the Model 6003 adds:
- Wideband analog RF connectors
- LVDS connections to the Zynq UltraScale+ FPGA
- GTY connections for 28 Gbaud gigabit serial communication
- 16 GByte DDR4 SDRAM
- All power supplies and clocking management for the RFSoC
The QuartzXM Model 6003 comes pre-loaded with a suite of Pentek IP modules for data capture and processing solutions that suit many common applications. Modules include DMA engines, DDR4 memory controller, test signal and metadata generators, data packing and flow control. The board also features pre-installed IP for triggered waveform and radar chirp generation, triggered radar range gate engine, wideband real-time transient capture, flexible multi-mode data acquisition and extended decimation.
A Design Kit includes all of Pentek’s electrical and mechanical design knowledge to quicken application-specific carrier designs. The kit includes a review of the customer’s design with Pentek’s engineering staff; pin definitions and electrical specifications of all signals on the module; 3D models of the module; thermal profiles of the module and components; carrier reference design schematics; PCB stack-up recommendations; PCB design guidelines and routing rules; operating system and bootstrap guidelines.