GHS adds multicore interference mitigation to Arm Cortex-A72

July 06, 2020 //By Ally Winning
Green Hills Software has extended its solution for DO-178C Level A multicore interference mitigation to Arm Cortex-A72 for DO-178C Level A applications.
Green Hills Software has extended its solution for DO-178C Level A multicore interference mitigation to Arm Cortex-A72 for DO-178C Level A applications.

The Bandwidth Allocation and Monitoring (BAM) functionality is a part of the INTEGRITY-178 Time-Variant Unified Multi-Processing (tuMP) RTOS. It allows the allocation and enforcement of bandwidth limits to shared resources for each processor core. The guarantee of access to shared resources based on application requirements or assurance level, allows BAM to mitigate multicore interference and minimize multicore worst-case execution time (WCET).

The BAM interference mitigation functionality monitors and enforces shared resource use as defined by the system integrator. When paired with Green Hills Software’s multicore SoC-specific WCET utility libraries, BAM ensures that critical partitions meet required deadlines and enable other lower criticality partitions to execute on other cores simultaneously with no impact on the critical applications. This remains true even as the other partitions are modified or as new partitions are introduced into the system.

Although some application-level mitigation is possible, it requires retesting and reverification of all the applications running on the multicore system when any application changes. This process adds costs and delays. The enforcement of multicore interference mitigation needs to be in the OS to achieve robust multicore partitioning. INTEGRITY-178 tuMP provides a general solution to multicore interference mitigation and minimizes retesting and verification after any application changes or additions.

Green Hills Software’s DAL A compliant BAM functionality monitors and enforces the bandwidth allocation of the chip-level interconnect to each of the cores.

The INTEGRITY-178 tuMP safety- and security-critical RTOS is designed to simultaneously meet DO-178C design assurance level (DAL) A and the separation kernel protection profile (SKPP v1.03) as defined by the NSA. INTEGRITY-178 tuMP is a multicore RTOS with support for any combination of asymmetric multi-processing (AMP), symmetric multi-processing (SMP), and bound multi-processing (BMP).

More information and white paper

https://www.ghs.com/download/whitepapers/GHS_multicore_interference.pdf

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