eFPGA implementation declared a success

September 07, 2020 //By Ally Winning
IC’Alps and ENSTA Bretagne have announced the successful implementation of an embedded FPGA (eFPGA) core on silicon.
IC’Alps and ENSTA Bretagne have announced the successful implementation of an embedded FPGA (eFPGA) core on silicon.

The eFPGA’s development comes from a research program funded by the European Union, Region Bretagne and local authorities. The program was intended to strengthen the technical competencies of ENSTA Bretagne in the cyber defence field.

The embedded FPGA (eFPGA) is a programmable IP core integrated into SoCs or custom ASIC. eFPGA technology is becoming a popular idea as market requirements change and ICs get even more complex and expensive to develop.

“Adding eFPGA functionality to ASIC designs brings the flexibility and performance of programmable logic without the cost, but with better power, performance, throughput and latency”, said Théotime Bollengier, IC architect at ENSTA Bretagne.

The ENSTA Bretagne eFPGA includes:

  • 3200 4-inputs look-up tables (LUTs)

  • Standard cell based to enable seamless generation from an RTL netlist

  • Technology independent core (standard cell based)

  • Fully integrated into standard RTL design flows

  • Generated and programmed with ENSTA’s ArGen framework

IC’Alps handled the silicon implementation and prototyping for the initial demonstrator of ENSTA’s technology. The company defined the IC, selected the foundry process, designed the chip (synthesis, floorplan, IO ring, place & route), performed post layout simulations and verifications before the fabrication. IC’Alps also took charge of the supply chain management including selection of partners, fabrication, and package assembly.

“This integrated circuit made for ENSTA Bretagne is a proof of our expertise in digital physical implementation and our capability to set up and manage a complete supply chain”, said Jean-Luc Triouleyre, CEO of IC’Alps. “Our Team has supported ENSTA-Bretagne from ASIC specification, reached tape-out and delivered packaged dies ontime, even during this COVID period. Last but not least, the team demonstrated its implication to reach first silicon good silicon”.

More information


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