The RAK has been designed to help developers improve power, performance, and area and get to market faster. Cadence worked with Arm to ensure that the Cadence Verification Suite improves overall verification productivity for customers using Cortex-A76. The 7nm RAK includes documentation to help with the optimisation of existing Cadence digital implementation flow using the latest tool features.
The Cadence Verification Suite interoperates with the Cortex-A76 processor and includes:
• JasperGold Formal Verification Platform: Enables IP and subsystem verification including formal proofs for Arm AMBA protocols
• Xcelium Parallel Logic Simulation: Provides production-proven multi-core simulation accelerating SoC development and validation of Arm-based designs
• Palladium Z1 Enterprise Emulation Platform: Includes hybrid technology that is integrated with Arm Fast Models for up to 50X faster OS and software bring-up and up to 10X faster software-based testing in addition to Dynamic Power Analysis technology for low power
• Verification IP Portfolio: Enables IP and SoC verification including Arm AMBA interconnect, supporting Xcelium simulation, the JasperGold platform, and the Palladium Z1 platform