UltraSoC teams up with Imperas for multicore development and debug
Under the terms of the agreement, UltraSoC will incorporate elements of Imperas’ development environment into its tools offering, giving designers a unified system-level pre- and post-silicon development flow.
Imperas’ virtual platforms and high-speed processor models allow software developers to start work at the earliest possible stage in an SoC project, and provides debug tools that give full visibility of the behavior of the entire system. The companies said that the combination of the two companies’ offerings creates an integrated design flow with a common software debug environment that gives a smooth transition as a project develops.
Their combined offering will support all common CPU architectures, including ARM, MIPS and the open-standard RISC-V instruction set architecture.
“Working with Imperas allows us to offer multicore designers a commercial-grade, time-saving and ultimately cost-effective platform to develop and launch industry-leading SoC designs,” said Rupert Baines, CEO of UltraSoC, in a statement. “Today’s announcement is a first step in realizing that shared world view of solving the challenge of systemic complexity.”
In the same statement Simon Davidmann, founder and CEO of Imperas commented: “UltraSoC offers unique embedded analytics technology, giving developers invaluable insights into the SoC and wider system implications.”
Charlie Hong-Men Su, CTO at Andes Technology, commented: “The combination of hardware and simulation solutions will help our mutual customers design the next generation of complex SoCs.”
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