FSP version 1.0 offers new security and connectivity features, advanced neural network, machine learning and motor control capabilities and enhanced compiler, debugger, and development environments.
FSP helps developers to re-use legacy code or combine it with Renesas software examples to quicken implementation of complex connectivity and security solutions. The FSP is available with FreeRTOS, which can be replaced by other RTOS or middleware depending on requirements. FSP and the Arm ecosystem third-party solutions combine to provide a broad range of user choices that allow developers to choose the software model that best suits their needs when using Renesas’ RA 32-bit MCUs.
FSP v1.0 features new security and connectivity features that enable complete chip-to-cloud connections. Publicly available source code includes middleware stacks that support secure connections to all major cloud providers. New security features in FSP v1.0 include secure key generation and persistent encrypted key storage, hardware acceleration for AES, SHA-2, RSA 2K, NIST and Brainpool elliptic curve cryptography, as well as secured MQTT connections over TLS.
FSP v1.0 also enhances support for neural network, machine learning and motor control. Arm CMSIS-NN libraries can be combined with new motor control features such as a three-phase general-purpose PWM timer (GPT) and a port output enabled GPT to create a predictive maintenance support solution.
Development tools, including compilers and IDEs, now support Renesas e2 studio, Arm Keil MDK, and IAR Embedded Workbench–“ for Arm. The RA Family Smart Configurator (RA SC) enables seamless FSP integration with third party IDEs and compilers. Support for Renesas E2 emulator and E2 emulator Lite debugging emulators and flash programmers has been added to the current debugging suite, which includes SEGGER J-Link.