CEA-Leti presents alternative to FinFET technology
The Institute researchers fabricated GAA nanosheet transistors with seven levels of stacked silicon channels, more than twice as many as state-of-the-art today, with widths ranging from 15nm to 85nm. The results were summarized in the paper, “7-Levels-Stacked Nanosheet GAA Transistors for High Performance Computing”, presented virtually during the 2020 Symposia on VLSI Technology & Circuits, June 14-19.
The seven levels of stacked nanosheet GAA transistors have been fabricated using a replacement metal gate process initially developed for FinFET.
The inner spacer and self-aligned contacts show excellent gate controllability with extremely high current drivability (3mA/μm at VDD=1V), and a three-x improvement in drain current over the usual two levels stacked nanosheet GAA transistors, reports CEA-Leti scientist Sylvain Barraud, one of the authors of the paper.
“By increasing the number of stacked-channels, we increase the effective width of the device for a given layout footprint,” Barraud explained. “Increasing the effective width induces higher drive current. This is why the DC performance of our devices is better than leading-edge devices.”
“We added specific modules for GAA structures on this FinFET route and we showed that for the same surface occupation we can propose an alternative to FinFET technology with a gate-all-around configuration,” the researcher highlighted. The wide range of variable nanosheet widths allows more design flexibility, which is not possible for FinFET because of its discrete number of fins.
CEA-Leti – www.leti-cea.com