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Cadence grows formal verification profile with Jasper DA buyout

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By eeNews Europe

Jasper has been one of a small set of companies developing formal analysis, providing multiple verification solutions (Verification Apps) built on the JasperGold platform. Jasper’s customers, the statement says, increasingly adopt formal analysis to complement traditional verification methods. With verification representing over 70% of the cost of developing a system-on-chip, it has become the top system and SoC development challenge and is the critical factor for time-to-market.

Jasper’s technology strengths are, Cadence says, “highly complementary” to its own System Development Suite, its integrated system verification solution since 2011. The combination will tie formal verification into the offering of common debug analysis, formal and semi-formal solutions, simulation, acceleration, emulation and prototyping platforms, while making use of its unified verification planning and metric-driven verification flow. The combination of extensive dynamic and formal VIP portfolios will be “particularly well suited” to enable embedded processor system verification.

“Jasper’s products are recognized as the technology leaders in formal analysis, targeting complex verification challenges and increasing overall verification productivity,” said Charlie Huang, senior vice president of the System & Verification Group and Worldwide Field Operations at Cadence. “Jasper’s formal analysis solutions are used by customers today alongside Cadence’s metric-driven verification flow to form a broad verification solution. We look forward to welcoming Jasper’s strong formal development expertise and skilled team to Cadence.”

Adding Jasper’s technology to its Incisive Formal technologies and expertise will result in the most complete formal and semi-formal offerings in the industry, Cadence claims.

Cadence; www.cadence.com


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