5 nm FinFET power management IP series
Vidatronic, Inc., has announced an addition to its IP portfolio, the 5 nm FinFET Series for integration into systems-on-a-chip (SoCs), for advanced microprocessor and high-speed serial interface applications. These IPs have been silicon validated by Vidatronic’s lead licensing customer.
The company’s portfolio simplifies the design process with customizable IP for easier and more cost-effective integration. Leveraging the new 5 nm FinFET IPs will enable customers to achieve unparalleled levels of performance, power efficiency, security, and reliability while minimizing cost. With nearly a decade of experience delivering advanced analog and power management IP globally, these latest IPs strengthen Vidatronic’s position as a leader in innovative analog technologies in FinFET processes.
The 5 nm FinFET Series contains the following IP:
- Multiple Low Dropout (LDO) Voltage Regulator IPs equipped with Vidatronic’s Power Quencher® technology that enables ultra-low-power operation with no external components required.
- Bandgap Voltage Reference IP with high accuracy and low power operation.
- Integrated support blocks, including power-on reset (POR), power-ok, and DAC.
“We’ve seen a clear need in the market for our team’s FinFET experience, especially for integrating the Power Management Unit (PMU) into SoCs in advanced microprocessor and high-speed serial interface applications,” said Moises Robinson, President and Co-Founder of Vidatronic. “Many processor chip providers are delivering unparalleled performance and system efficiency by integrating the power management on-chip in these FinFET technologies. Vidatronic’s expertise helps our customers seamlessly deal with voltage stress issues, uneven loading profiles, and other challenges. Our proprietary technology includes advanced features that circumvent these challenges and provides reliable protection for the SoC. We are confident this FinFET extension to our portfolio will enable our customers to get to market faster in these advanced processes and maximize efficiency and performance of their SoCs.”