2017 Silicon Valley Flash Memory Summit Survives the Fire

2017 Silicon Valley Flash Memory Summit Survives the Fire

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Reporting from this year’s Flash Memory Summit, William Wong laments the fact that the exhibition portion of the event was a casualty of a show-floor fire, “Evidently, plugging the electronics for an entire booth into a single power strip isn’t a good idea…. Flash technology may be hot, in one way or another, this year, but it was old-fashioned ac that was at issue this time around.”
By eeNews Europe


“I did get a number of interviews and insights despite the show floor being closed. For example, Crossbar is focusing its resistive RAM (ReRAM) in the embedded space. Look for it cropping up in microcontrollers and embedded chips versus DRAM DIMM slots. The ReRAM persistent-memory (PM) technology has significant advantages compared to flash including integration with CMOS manufacturing processes especially as designs shrink to smaller process nodes (Fig. 1).


Figure 1. ReRAM has significant advantages compared to flash, including integration with CMOS manufacturing processes, especially as designs shrink to smaller process nodes.


ReRAM already has 100 times the read latency of flash and is 1000 times faster on writes. It doesn’t have the write lifetime issues associated with flash, especially with the move toward high-capacity TLC and QLC technologies. It can handle temperatures from −40°C to 125°C. ReRAM could address DRAM and the other NVRAM technologies, but that’s a high stakes game requiring deep pockets for distribution. The embedded space is a more practical target for now, and one where ReRAM retains its advantages as processes scale to 10 nm and below. It can also handle 3D stacking implementations. Look for some interesting microcontroller and microprocessor systems with ReRAM on-chip. The chips will likely include larger amounts of memory.


Everspin Technologies’ Spin Torque magnetoresistive random-access memory (ST-MRAM) is another PM technology focusing on niche markets versus taking on DRAM or flash memory on a wholesale basis. Like ReRAM, capacity is the main limiting factor, as MRAM also provides faster writes, faster overall performance, and unlimited write lifetimes.


Figure 2. The Everspin nvNITRO line includes U.2 (shown) and PCIe card solutions using ST-MRAM.


The nvNITRO line of NVMe devices is one of a number of Everspin MRAM focus points (Fig. 2). The firm is also sampling its 1-Gb ST-MRAM chips. The 1- and 2-GB nvNITRO systems are based on the earlier 256-Mb ST-MRAM chips. The systems can deliver over 1.5 million IOPS with 6-μsec end-to-end latency. It will target caching and logging solutions in which high performance offsets a system’s more limited capacity.


I also got a few more details about the NGSFF form factor that has also been call the “Ruler” by Intel (Fig. 3). The case is 325.25 mm long and can be stacked on 12.5-mm centres. The 38.6-mm height allows the modules to fit into a 1U rack-mount system. They plug into a vertical backplane connector from Amphenol, and the interface is compatible with M.2. M.2 modules are typically 22 mm wide and up to 110 mm long. NGSFF provides five times the area of a large M.2 module.


Figure 3. The NGSFF form factor is about a foot long with a hot-swap edge connection (left). It’s designed to fit into a 1U rack.


The NGSFF modules will be found in platforms such as Samsung’s 1U OB127-LX (Fig. 4). The rack-mount systems hold up to 36 hot-swappable NGSFF modules for a current total capacity of 576 TB. This storage system runs a pair of Xeon processors with 24 DDR4 DIMM slots and two M.2 sockets that support PCEe Gen 3 x4 or SATA M.2 modules. It has Gigabit Ethernet interfaces and redundant, hot-swap power supplies.


Figure 4. Samsung’s 1U OB127-LX holds up to 36 hot-swappable NGSFF modules for 576-TB capacity.


Other trends I saw at the show include the rapid adoption of NVMe and NVMe-over-Fabric (NVMe-oF), (see links). NVMe-oF is applicable to high-performance embedded computing (HPEC).


The Storage Networking Industry Association’s (SNIA) NVM programming model (NPM) is worth investigating if you haven’t heard about it (see link). It’s applicable to NVMe as well as the JEDEC Solid State Technology Association’s NVDIMM-F, NVDIMM-N, and NVDIMM-P standards that implement PM on a processor’s memory bus.


High-end solutions weren’t the only game in town, though. Embedded storage was on the agenda, too, from discussions about the effectiveness of MLC and TLC in the embedded space to security issues. I talked with Swissbit about its secure USB module (Fig. 5).


Figure 5. Swissbit’s USB module can protect data from inadvertent or malicious updates by requiring signed content.


The Swissbit module is already available with SLC NAND flash, and its error-code-correction (ECC) support provides reliable storage. The flash firmware can be updated in the field, but it requires signed code from Swissbit. The firmware provides the same capability for user data, so updates for system boot code can be required to match digital signature information stored on the module. This additional security feature can be added to existing systems by replacing the USB module with one from Swissbit. It’s one of the few options available to designers with existing designs or products in the field.


Figure 6. SD cards from Swissbit can incorporate a secure element that runs Java applications to manage encrypted storage.


Much of Swissbit’s security features are customizable, so developers will need to work with them to get the most out of a system. For example, the boot-code protection is actually more extensive with support for multiple partitions. Swissbit’s security expertise is built on the company’s extensive support for security-related products such as its secure SD cards with a secure element that runs Java applets to manage encrypted storage (Fig. 6).


See also;

NVMe over Fabric Addresses Hyperscale Storage Needs


SNIA delivers non-volatile memory programming model



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