Three-level flash gives way to four in bid for greater capacity

April 09, 2019 // By Daniel Zajcev
Three-level flash gives way to four in bid for greater capacity

Flash memory has been a disruptive technology from its industrial inception in the early '90s and innovation is still ongoing after more than 25 years. Today the most advanced storage products use NAND flash. Thanks to its storage density, quality and reliability NAND has changed our lives. Through continuous development, investments and improvements by flash vendors such as Toshiba and Intel, the technology has become a mainstream consumer product as well as a robust and reliable solution for embedded applications.

The influence of market demand and advancements in manufacturing resulted in 2D NAND reaching its highest point of technological maturity. On the one hand, 2D SLC NAND offers extremely fast access times, low latencies, good energy efficiency and robustness. However, from an economical perspective investing into the production of 2D NAND is not financially viable for vendors anymore, given the demands for larger capacities. Each successive shrink of the cells enabled manufacturers to produce a higher cell count per wafer. Starting out with a cell size of 350nm in 1997 vendors are now able to produce 2D NAND flash cells with a 16nm structure. This in turn led to lower prices for 2D NAND flash and better availability due to a higher GB per wafer yield.

However, the miniaturisation of NAND flash also brought along several technical limitations to flash vendors. One major limitation is that with each shrinking process of the cells the number of available electrons becomes substantially less.

Design category: 

Vous êtes certain ?

Si vous désactivez les cookies, vous ne pouvez plus naviguer sur le site.

Vous allez être rediriger vers Google.