SmartVision is an open environment allowing the design of complete subsystems based on processor cores and peripherals. It provides the tools to debug embedded software by simulation or by In Circuit Emulation.
Key benefits of the IDE include:
• an API to describe behavioural models of new components
• advanced debug features with a breakpoint composer for complex behaviour analysis
• a versatile solution for embedded software debug by using In Circuit Emulation with FPGA/ASIC and by simulating a Cycle Accurate Bit Accurate (CABA) model
• a power optimisation and estimation solution
• the Built-In-Real-time Debugger, BIRD, a debug unit, with JTAG interface
The support of RISC-V through the RV32 Tornado subsystem offers a turnkey solution to configure and optimise ultra-low power SoCs. Tornado includes a RISC-V Instruction Set Simulator with configurable timing annotations, a RISC-V toolchain (GCC) and RISC-V musl libraries precompiled for RISC-V extensions.